A New Approach for High Speed and Energy Efficient Carry Skip Adder

Authors:P. V. B. TEJASWINE, P. SARVANI

0571-0576

Design of Novel 4-Bit Multiplier Circuit by using Self Resetting Modified GDI Logic (SR-MGDIL)

Authors:SREENIVASULU PASUPULETI, C. PAKKIRAIAH

0577-0581

Low Area Advanced Single Fault Correction Technique for Parallel FFTs

Authors:KALLURI MANIDEEPTHI, S. SRAVANTHI, M. PADMAVATHI, DR. M. GURUNADHA BABU

0582-0587

Hardware Security with Sticky Counter to Prevent Scan Based Attacks

Authors:RANGU LAVANYA, DR. G. SHANMUGAPRIYA, S. GOPALA KRISHNA

0588-0591

RTL Design and Implementation of TCM Decoders using Viterbi Decoder

Authors:S. YASMINE, E. BALA KRISHNA

0592-0597

Implementation of Bram Multiported Memory

Authors:A. RAMESWARI, K. C. KULLAYAPPA

0598-0602

Implementation of Low Voltage CMOS Differential Logic Circuit with Threshold Voltage

Authors:K. ANITHA, E. BALA KRISHNA

0603-0607

Implementation of Non Fracturable and Fracturable with Varying MUX/LUT

Authors:K. BABU, E. BALA KRISHNA

0608-0611

Design of Testable Reversible Sequential Circuits

Authors:G. DRUVA KUMAR, G. VIJAYA RAJU, A. V. S. S. VARMA, DR. D. RANGARAJU

0612-0618

Area-Delay Efficient Architectural Design of Radix-4 Pipeline OFDM Using Fast Fourier Transform Processor

Authors:BANDARU DURGA MANOJKUMAR, DURGASI LOKESH

0619-0623